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Conference Program of the Austrochip 2005
8:30 - 9:30 |
Registration and breakfast
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9:30 - 9:45 |
Conference opening
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9:45 - 10:30 |
Invited presentation: Spaceborne Integrated Electronics,
Manfred Sust, Austrian Aerospace
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10:30 - 12:00 |
Analog and Mixed-Signal session (Session Chair Wolfgang Pribyl):
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A Novel Low Power Continuous-Time SD-Modulator Architecture with Tracking Quantizer for UMTS Applications,
Lukas Dörrer, Patrizia Greco, Claus Kropf, Patrick Torta, Infineon Technologies Austria AG
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An oversampled SD Current-Steering D/A-Converter Module for SoC-Integration in 0.13µm CMOS,
Wolfgang Klatzer, Martin Clara, Andreas Wiesbauer, Dietmar Sträussnigg, Infineon Technologies Austria AG
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Auf einem Stromlaufplan basierender Chip/Package-Codesign-Flow für Mixed-Signal System-in-Package-Designs,
Thomas Brandtner, Infineon Technologies Austria AG
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Fully differential operational amplifier with positive feedback for common-mode control and for self biasing of cascodes,
Franz Schlögl, Horst Zimmermann, Institut für elektrische Mess- und Schaltungstechnik, TU Wien
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Mixed Signal ASIC Platform for Generic Sensor Interface in Automotive Applications,
L. Fanucci, F. Iozzi, C. Marino, University of Pisa, Italy; M. De Marinis, A. Giambastiani, A. Rocchi, SensorDynamics AG
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12:00 - 13:30 |
Lunch and poster session
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13:30 - 15:00 |
Digital session (Session Chair Karl C. Posch):
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An Efficient Test and Diagnosis Environment for Communication Controllers,
Eric Armengaud, Andreas Steininger, Embedded Computing Systems Group, TU Wien; Martin Horauer, Fachhochschule Technikum Wien,
Fachbereich Embedded Systems
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Evaluation of a Java Processor,
Martin Schöberl, Institut für Technische Informatik, TU Wien
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Optimierter DDR2 IP Core für Virtex-4,
Hannes Muhr, Institut für Computertechnik, TU Wien; Gerhard Cadek, Oregano Systems
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Power-aware Design Space Exploration of µC-Architectures using SystemC,
Dietmar Scheiblhofer, Josef Haid, Infineon Technologies Austria AG
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Scaling ECC Hardware to a Minimum,
Johannes Wolkerstorfer, Institut für Angewandte Informationsverarbeitung und Kommunikationstechnologie, TU Graz
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15:00 - 15:30 |
Coffee break and poster session
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15:30 - 15:40 |
ASIC Design Contest 2005 sponsored by austriamicrosystems, presentation of the accepted projects
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15:40 - 16:40 |
Panel discussion "Schutz oder Offenlegung von geistigem Eigentum - Welche Strategie ist die erfolgversprechendere?"
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Guests: Wilhelm Epping, Patent Attorney; Ferdinand Gibler, Patent Attorney; Fritz Paschke, TU Wien; Wolfgang Pribyl, TU Graz;
Manfred Sust, Austrian Aerospace
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16:40 - 16:50 |
Closing and forecast to Austrochip 2006
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Papers presented at the poster sessions:
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A 400 MIPS superscalar processor in a 0.35 micron mixed signal technology,
Hannes Hadl, austriamicrosystems
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A dedicated top-down approach to timing analysis in asynchronous single-rail handshake circuits,
Gregor Kowalczyk, Holger Bock, Infineon Technologies Austria AG
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A gmC-Filter in 120nm CMOS Using a Linear Transconductor,
Robert Kolm, Horst Zimmermann, Institut für elektrische Mess- und Schaltungstechnik, TU Wien
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A Model to Understand Current Consumption, Maximum Operating Frequency And Scaling Trends Of MCML Frequency Dividers,
Roberto Nonis, Enzo Palumbo, Pierpaolo Palestri, Luca Selmi, University of Udine, Italy
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An on-chip technique to measure the delay time of a comparator in 120nm CMOS technology,
Bernhard Goll, Marco Spinola-Durante, Horst Zimmermann, Institut für elektrische Mess- und Schaltungstechnik, TU Wien
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Auswirkung von Fehlerquellen anhand eines Matlab-Modells für 1.5 Bit/Stufe Pipeline-ADCs,
Thomas Hebein, Martin Trojer, Micronas Villach Halbleiterentwicklungs-GmbH; Wolfgang Werth, FH Technikum Kärnten
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Considerations for a Robust Design of Polar Modulator Transmitters,
Thomas Mayer, Andreas Springer, Institute for Communications and Information Engineering, Johannes Kepler Universität Linz;
Christian Mayer, Richard Hagelauer, Institut für Integrierte Schaltungen, Johannes Kepler Universität Linz;
Günter Märzinger, Burkhard Neurauter, DICE GmbH
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Design of an Asynchronous Microprocessor with Four-State Logic,
Martin Delvai, Gottfried Fuchs, Thomas Handl, Wolfgang Huber, Andreas Steininger, Institute of Computer Engineering,
Embedded Computing Systems Group, TU Wien
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Entwurf eines Embedded Systems und IP-Cores zur Uhrensynchronisation,
Thomas Bigler, Franz Winkler, Institut für Computertechnik, TU Wien;
Georg Gaderer, Forschungsstelle für Integrierte Sensorsysteme, Österreichische Akademie der Wissenschaften
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High-Speed Elliptic-Curve Cryptography Processor for GF(p),
Christian Pühringer, Johannes Wolkerstorfer, Institut für Angewandte Informationsverarbeitung und Kommunikationstechnologie, TU Graz
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Hydra: Schachmatt mit Chips,
Chrilly Donninger, Nimzo Werkstatt OEG; Ulf Lorenz, Universität Paderborn
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Multi-Purpose IC in a 0.35-µm CMOS Technology for High-Voltage Driver Application,
Cang Ji, Wolfgang Mayerwieser, Rainer Krenzke, Dialog Semiconductor GmbH
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Last update: September 2005, final program may be subject of change
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