Austrochip 2007

15th Austrian Workshop on Microelectronics
11 October 2007, Graz, Austria.

IAIK - Institute for Applied Information Processing and Communications

Conference Program of the Austrochip 2007

8:30 - 9:30 Registration and breakfast
   
9:30 - 9:45 Conference opening
9:45 - 10:30

Invited talk: Andreas Burg (ETH Zürich),
'MIMO Communication: The Future of Wireless and a Challenge for VLSI Design'

   
10:30 - 11:00 Break
   
11:00 - 12:45 Analog session (Session Chair Wolfgang Pribyl, TU Graz)
 

ASIC Design Contest 2007: Award ceremony

Weixun Yan (Vienna University of Technology),
'A Chopper Amplifier in 0.12 µm CMOS'

Rainer Wohlgenannt (Austrian Research Centers),
'Geschalteter Transienten-Verstärker mit kapazitiver Rückkopplung [...]'

Gerald Zach (Vienna University of Technology),
'Oscillator and On-Chip Multi-Phase Generation for Distance Measurement Circuits'

Artur Marchlewski (Vienna University of Technology),
'A Receiver with Spatially Modulated Phototransistors'

Robert Kolm (Vienna University of Technology),
'3rd-Order Current-Input/Output Filter with Virtual Ground in 65nm CMOS'

   
12:45 - 14:00 Lunch and poster session
   
14:00 - 15:45 Digital session (Session Chair Jan Haase, TU Wien)
 

Peter Bliem (Graz University of Technology),
'Design of an ASIC for an Acoustic Noise Cancellation System with a Digital Adaptive Filter'

Mario Kirschbaum (Graz University of Technology),
'Evaluation of Power Estimation Methods Based on Logic Simulations'

Johannes Loinig (Graz University of Technology),
'Packet Filtering in Gigabit Networks Using FPGAs'

Jörn-Marc Schmidt (Graz University of Technology),
'Optical and EM Fault-Attacks on CRT-based RSA: Concrete Results'

Martin Feldhofer (Graz University of Technology),
'Comparing the Stream Ciphers Trivium and Grain for their Feasibility on RFID Tags'

   
15:45 - 16:15 Coffee break and poster session
   
16:15 - 17:30 Design & verification session (Session Chair Timm Ostermann, Johannes Kepler Universität Linz)
 

Markus Damm (Vienna University of Technology),
'Using Converter Channels within a Top-Down Design Flow in SystemC'

Rainer Findenig (Fachhochschule Hagenberg),
'Effiziente Hardware-Abbildung von PSL-Assertions'

Julian Grahsl (Vienna University of Technology),
'SAFE - A Scalable Environment for Automated Transistor Level Fault Effect Analysis'

   
17:20 - 17:25 Outlook to Austrochip 2008

Poster session

  Poster session
 

Peter Rössler, Martin Zauner (Fachhochschule Technikum Wien),
'Evaluierung eines Esterel-basierenden Hardware/Software Co-Design Flows'

Eric Armengaud, Wolfgang Forster (Vienna University of Technology),
'A Novel Interconnection Approach for Globally Asynchronous Locally Synchronous Circuits'

Martin Flatscher (Infineon Technologies),
'A very fast rationed Double Precharged True Single Phase Clocked (TSPC) Flip Flop'

Peter Tummeltshammer (Vienna University of Technology),
'Exploring Hardware Software Partitioning on the Example of a Face Recognition System'

Pawel Chojecki, Stephan Dobretsberger (austriamicrosystems AG),
'High Voltage DC/DC Converter for Low Power Applications'

Robert Fasthuber (Fachhochschule Hagenberg),
'An Exploration of Hierarchical Design Implementation Flows'

Proceedings only

  In the proceedings
 

Wandad Guscheh (DICE),
'Power Optimierung auf Entwurfsebene von einem 16-Bit RISC-Prozessor für mobile Endgeräte'

Michael Kreuzgruber (Fachhochschule Hagenberg),
'Implementation des CORDIC-Algorithmus zur Berechnung der inversen Kinematik [...]'

Martin Schöberl (Vienna University of Technology),
'SimpCon -- a Simple and Efficient SoC Interconnect'

Ferraz Kleber (Fachhochschule Technikum Kärnten),
'Creating Transfer Functions of Devices under High Frequency with Matlab from Measurements [...]'

Friedrich P. Leisenberger (austriamicrosystems AG),
'Embedded 0.35 µm HV-CMOS EEPROM Technology [...]'

Melanie Lackner (Kompetenzzentrum Automobil- und Industrieelektronik),
'Evaluation of DeltaVSD Measuring Method to detect Package Irregularities in Smart Power Switches'

The Austrochip 2007 workshop received 32 submissions. 25 were accepted (78%).