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Program
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08:00 - 09:00
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Breakfast and Registration
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09:00 - 09:15
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Conference Opening
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| 09:15 - 10:00 |
Keynote Address
- Microelectronics – Quo Vadis?
Gerhard Kahmen
IHP (Leibniz Institute for High Performance Microelectronics) & BTU (Brandenburg University of Technology)
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10:00 - 10:15
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Break, Exhibition
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| 10:15 - 11:30 |
Paper Session I
Session Chair: Manfred Ley
Carinthia University of Applied Sciences
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Static Digital Pre-Distortion Method for High-Speed Current-Steering Digital-to-Analog Converters
Patrick Valet, David Schwingshackl, Ulrich Gaier and Andrea Tonello
Connected Home Division, MaxLinear Austria GmbH
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Considerations on High-Performance Frequency Synthesizers and High-Q Oscillators
Ehrentraud Hager and Harald Pretl
Christian Doppler Laboratory for Digitally Assisted RF Transceivers for Future Mobile Communications, Johannes Kepler University Linz
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A 18-33 GHz Variable Gain Down-Conversion Mixer in 0.13m SiGe:C BiCMOS technology
Syed Sharfuddin Ahmed and Hermann Schumacher
Institute of Electron Devices and Circuits, Ulm University
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Noise Behaviour of EMI Improved Folded Cascode Amplifier Input Stages Including Layout Parasitics
Nikolaus Czepl and Dominik Zupan
Institute of Electronics (IFE), Graz University of Technology
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Input/Output-Interlocking for Fault Mitigation in QDI Pipelines
Zaheer Tabassam, Patrick Behal, Robert Najvirt and Andreas Steininger
Institute for Computer Engineering, TU Wien
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11:30 - 13:00
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Lunch Break, Exhibition
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| 13:00 - 14:00 |
Paper Session II:
Session Chair: Peter Söser
Institute of Electronics (IFE), Graz University of Technology
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Design of a Stacked C-DAC Output Stage with Feed-Forward Assisted Cascode Charging in 16 nm FinFET Technology
Alessandra Cangianiello, Michael Kalcher, Daniel Gruber and Martin Clara
Intel Austria GmbH
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Analysis of TX-harmonics suppression in RF-DAC-based transmitters
Damir Hamidovic, Peter Preyler, Christoph Preissl, Mario Huemer and Andreas Springer
Christian Doppler Laboratory for Digitally Assisted RF Transceivers for Future Mobile Communications, Johannes Kepler University Linz
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A case study of BAG2 automized layout generation methodologies for a two-stage OTA in 28nm TSMC technology
Fatemeh Abbassi, Mirjana Videnovic-Misic, Mudasir Bashir, Feifei Zhang, Timm Ostermann and Gernot Hueber
Millimiter Wave Technologies (mmW), RF Systems, Silicon Austria Labs GmbH
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14:00 - 14:15
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Break, Exhibition
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| 14:15 - 14:45 |
Paper Session III:
Session Chair: Andreas Steininger
Institute of Computer Engineering, Vienna University of Technology
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Exploiting Parasitics to Design a Flip-chip Integrated Transformer Based Matching Network
Pankaj Venuturupalli, Sina Mortezazadeh Mahani, Sondón Martin Santiago and Johannes Sturm
Silicon Austria Labs GmbH
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Prototyping for a DDS-based I/Q reference signal generation on a capacitive sensing chip in 65nm CMOS using SystemC AMS, C HLS and VHDL
Matthew Bio, Harald Gietler, Josip Plazonic, Manfred Ley, Hubert Zangl and Wolfgang Scherr
Department of Integrated Systems and Circuit Design, Carinthia University of Applied Sciences
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14:45 - 15:00
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Break, Exhibition
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| 15:00 - 16:30 |
Tutorial Session
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16:30 - 17:00
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Conference Closing and Outlook Austrochip 2022
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