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Austrochip 2018 Conference Program:
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08:00 - 09:15
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Registration and Breakfast
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09:15 - 09:30
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Conference Opening
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| 09:30 - 10:00 |
Keynote Address
- Werner Magnes (Space Research Institute, Austrian Academy of Sciences)
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| 10:00 - 10:45 |
Session I: Analog and Mixed-Signal Circuit Design
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Prototype Design of a Magnetometer Frontend-ASIC for Spaceborne Applications
Mario Auer, Maximilian Scherzer, Aris Valavanoglou, Stefan Leitner and Werner Magnes
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Maximizing Temperature and Process Corner Performance of Operational Amplifiers with a Novel Self-Adjusting Biasing Technique
Timo Mai, Amelie Hagelauer and Robert Weigel
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10:45 - 11:15
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Coffee Break, Exhibition
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| 11:15 - 12:45 |
Session II: RF Integrated Circuit Design
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SCPA Transformer Based Matching Network Design Flow and SiP Implementation
Abdelhamed Eldeeb, Graciele Batistell, Wolfgang Boesch and Johannes Sturm
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A Quadrature Switched-Capacitor RF-DAC Drain Efficiency Model for Back-Off Operation
Ehrentraud Hager, Tobias Buckel, Stefan Schmickl, Antonio Passamani, Harald Pretl and Andreas Springer
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Design of DAC Based RMS Power Detector for RF Applications
Ivan Sejc, Suchendranath Popuri and Johannes Sturm
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A 180-nm 1.2 V LO Divider with Quadrature Phase Generation for Low-Power 868 - 915 MHz SRD-Band Applications
Tim Schumacher and Harald Pretl
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12:45 - 14:15
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Lunch, Exhibition
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| 14:15 - 14:45 |
Keynote Address
- Werner Luschnig (Silicon Austria Errichtungs GmbH)
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| 14:45 - 15:30 |
Session III: Optical and Digital Communication Circuit Design
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3D-Integrated Transceiver for Optical Communications
Nemanja Vokic, Bernhard Schrenk, Paul Muellner, Bernhard Goll, Daivid Fowler, Stefan Jessenig, Jochen Kraft, Maryse Fournier, Viviane Muffato, Rainer Heinberger, Kerstin Schneider-Hornstein and Horst Zimmermann
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Advanced Delay-Insensitive 4-Phase Protocols
Florian Huemer and Andreas Steininger
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15:30 - 15:45
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Closing of Austrochip 2018 and Outlook on Austrochip 2019
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15:45 - ...
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Get Together with Coffee and Cake
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