Invited Speakers: Austrochip Workshop 2022

Keynote 1

Benjamin Prautsch
 
Fraunhofer-Institut für Integrierte Schaltungen IIS
Institutsteil Entwicklung Adaptiver Systeme EAS
Münchner Straße 16, 01187 Dresden, Germany


"Automatic Analog Design and Layout Generation: Chances and Hurdles"

Abstract:
To this day, analog circuits elude comprehensive layout synthesis and therefore still have to be designed manually. Due to shrinking to ever more advance nodes as well as due to increasing design complexity, the pressure on analog designers is immense and growing. Despite a variety of improvements in design environments, full analog automation is still in its infancy.
One promising approach - besides synthesis methods - applies procedural methods and specifically generators in the design process. Generators create design data automatically in an often (but not always) PCell-like way. Novel cross-technology concepts allow generators to be technologies-agnostic, too. Thus, they not only systematize the design process and shorten design time, generators also open up the possibility of analog design reuse across design projects. Especially when requirements and/or target technologies change, design efficiency can be significantly increased.
However, generators are not "for free". They become effective when applied to the right sweet spot. For example, the initial development efforts will pay off when applied on a broader project view that considers, e.g., a product family or when applied to repetitive or human-unfriendly tasks. This requires both some degree of re-thinking the design approach as well as close cooperation between analog designers and EDA developers.
The keynote will first briefly introduce design problems of analog integrated circuits and present current approaches to solve them. This is followed by a closer look at design automation concepts, especially generators that enable the development of cross- technology layout generators. Afterwards, the talk discusses chances and hurdles when applying the generator-based approach in real design projects. An outlook on possible further steps towards a re-use-oriented and highly automated analog design flow concludes the talk.

About the Speaker:
Benjamin Prautsch received the Diploma degree in electrical engineering from the Dresden University of Technology in 2013 and is with Fraunhofer IIS/EAS ever since. His major interest lies in generator-based analog design automation and design flows. Since 2018 he is heading the group Advanced Mixed-Signal Automation that focuses on analog design automation and reuse methods. 		 

 

Keynote 2

Petri Solanti
Siemens Electronic Design Automation GmbH
WT Sales TSS Calypto EU
Arnulfstraße 201, 80634 München, Germany


"High-Level Synthesis and Verification - The next revolution in digital ASIC design"

Abstract:
High-level description languages and logic synthesis revolutionized the digital design in early 90'es. Since then, the technology has evolved to handle the technical challenges of the new ASIC technologies, but the design entry in register-transfer-level has remained the same. At the same time the design sizes and complexities have skyrocketed - and the design and verification costs too.
Now it is time to raise the abstraction level of digital design and verification. High-Level Synthesis and Verification enable the design and verification of large digital systems to be done using C++ or SystemC language without having to think about microarchitecture during the modeling. Moving both modeling and verification to the higher abstraction level allows using novel methodologies that shorten the time from specification to tapeout dramatically. It is time for the next design methodology revolution.

About the Speaker:
Petri Solanti received his M. Sc. EE degree in Semiconductor Engineering and Computer Science at Tampere University of Technology in 1992. After working as a system architect for several ASIC projects, he joined Cadence Design Systems as a field application engineer for system-level design tools in 1997. He was one of the early champions of Electronics System Level (ESL) methodology and has been promoting ESL in the leading EDA companies and MathWorks. 2017 Petri joined Siemens EDA, former Mentor Graphics, as a system-level flow specialist focusing on digital system design, High-Level Synthesis and Verification and Model-Based Systems Engineering (MBSE). 		 

 

 

Invited Speakers: Tutorial on Integrated Power Electronics

 

Gerald Deboy
Infineon Technologies Austria AG
Siemensstrasse 2, 9500 Villach, Austria


Tutorial I: "Insights into SiC and GaN technology and its benefits for power systems"
About the Speaker:
Dr. Gerald Deboy received his M.S. and Ph.D. degrees in physics from the Technical University Munich in 1991 and 1996, respectively. He joined Siemens Corporate Research and Development in 1992 and the Semiconductor Division of Siemens in 1995, which became Infineon Technologies later on. His research interests were focused on the development of new device concepts for power electronics, especially the revolutionary CoolMOS™ technology. From 2004 onward, he headed the Technical Marketing Department for power semiconductors and ICs within Infineon Technologies Austria AG. Since 2009 he has been leading a business development group specializing in new fields for power electronics. He is a Sr. member of IEEE and has served as a member of the Technical Committee for Power Devices and Integrated Circuits within the Electron Device Society. He has authored and co-authored more than 100 papers in national and international journals, including contributions to three student textbooks. He currently holds more than 100 granted international patents and has more applications pending. 		 

 

Christian Mentin
Silicon Austria Labs
Europastraße 12, 9524 Villach, Austria


Tutorial II: "Multi domain simulations for power electronics - A pathway towards electro-thermal co-simulation"
About the Speaker:
Christian Mentin graduated in Electrical Engineering and Information and Computer Engineering from Graz University of Technology in 2016. In 2018 he got his PhD degree from Graz University of Technology and since then he is Scientist at Silicon Austria Labs and leading the research group "Multiphysics & Packaging" in the field of power electronics. His professional experience reaches from industrial applications towards application-oriented research topics including system level packaging and simulation of power electronic systems. 		 

 

Emanuele Bodano
Infineon Technologies Austria AG
Siemensstrasse 2, 9500 Villach, Austria


Tutorial III: "Integrated Power Supply For Data Center Application, challenges and trends"
About the Speaker:
Emanuele Bodano was born in Cagliari, Italy, in 1973. He received the Electronic Engineer B.S. degree from Cagliari University, Italy, in 1998. He started as Analog Designer in CTR in Villach, joined Infineon Technologies in 2001 as Analog Designer and subsequently became Concept Engineer in the SMPS for automotive applications. Since 2018 he his Concept Engineer for Power Stage for datacenter application. He produced more than 15 patents and 6 conference publication in the Power management Field. His main research interests are in the driver circuit for DCDC, EMI mitigation design techniques, and digital control architecture. Since 2000 he also teaching a module in the "Cyber Physical System Architecture" course at Uni Cagliari (IT). 		 

 

 

Invited Speakers: Tutorial on High-Level Design and Verification

 

Petri Solanti
Siemens Electronic Design Automation GmbH
Arnulfstraße 201, 80634 München, Germany


Tutorial Ia: "High-level Synthesis and Verification in an Integrated Digital IC/FPGA Design Flow"

Tutorial III: "HW/SW Co-Architecting Flow for HW Accelerator Design in ML Applications"
About the Speaker:
Petri Solanti received his M. Sc. EE degree in Semiconductor Engineering and Computer Science at Tampere University of Technology in 1992. After working as a system architect for several ASIC projects, he joined Cadence Design Systems as a field application engineer for system-level design tools in 1997. He was one of the early champions of Electronics System Level (ESL) methodology and has been promoting ESL in the leading EDA companies and MathWorks. 2017 Petri joined Siemens EDA, former Mentor Graphics, as a system-level flow specialist focusing on digital system design, High-Level Synthesis and Verification and Model-Based Systems Engineering (MBSE). 		 

 

Werner Bachhuber
Siemens Electronic Design Automation GmbH
Arnulfstraße 201, 80634 München, Germany


Tutorial Ib: "High-level Synthesis and Verification in an Integrated Digital IC/FPGA Design Flow"
About the Speaker:
Dr. Werner Bachhuber received his Dr.-Ing. and Dipl.-Ing. degrees in Electrical Engineering from Technical University of Munich in 1998 and 1989. More than 18 years he developed high-speed telecommunications ASICs from the specification down to the physical layout. Back in 2002 he started using SystemC for high-level verification and modeling of implementation prototypes. Throughout his career at leading semiconductor companies he developed a SerDes system simulator in MATLAB and later joined MathWorks for supporting customers with their model-based design and HW/SW co-design flows for ASIC, FPGA, and SoC developments. In 2021 Werner joined Siemens EDA concentrating on high-level synthesis and verification flows based on C++ and SystemC. 		 

 

Karsten Einwich
COSEDA Technologies GmbH
Königsbruecker Str. 124, 01099 Dresden, Germany


Tutorial II: "SystemC-based Design Flow for RF/Analog Mixed-Signal Designs with HLS/HLV"
About the Speaker:
Karsten Einwich is CEO of COSEDA Technologies, a Germany-based company founded in 2015 that offers software solutions in the field of system level design for complex electronic hardware and software products. Karsten Einwich has more than 30 years of experience in the field of modelling, simulation and verification of complex heterogeneous systems.
During his over 20 years at the Fraunhofer Institute for Integrated Circuits IIS, Division Engineering of Adaptive Systems he managed a research group which developed methods and tools for the design of electronic hard- & software components in the context of the whole system. Karsten Einwich was deeply involved in the development and standardization process (IEEE & Accellera) of the SystemC AMS modelling and simulation technology.
His activities in various national and international industrial as well as academic projects over the past 25 years have made him a highly recognized expert in in the field of how to make latest system modeling, simulation, design and verification methodologies efficient, practical and usable. 		 

 

Thomas Arndt
COSEDA Technologies GmbH
Königsbruecker Str. 124, 01099 Dresden, Germany


Tutorial II: "SystemC-based Design Flow for RF/Analog Mixed-Signal Designs with HLS/HLV"
About the Speaker:
Thomas Arndt is Application Manager at COSEDA Technologies, a Germany-based company founded in 2015 that offers software solutions in the field of system level design and simulation for complex electronic hardware and software products.
He has over 20 years of experience in the chip design and the EDA industry. His particular areas of expertise are in the field of digital as well as analog design and simulation and High-Level Synthesis.
Prior to joining COSEDA, he was working at the Fraunhofer Institute for Integrated Circuits, one of the largest research institutions in the field of design automation in Europe. He received his diploma in electrical engineering from the Technical University of Dresden.